Registers and Counters A register consists of a group of flip-flops and gates that affect their transition. An n-bit register consists of n-bit flip-flops capable of storing n bits of binary information. In addition to flip-flops, a register may have combinational gates that perform certain data processing tasks.
3
4-Bit Parallel Registers 10 • The common clock input triggers all flip-flops on the positive edge of each pulse -5 the binary data available at the 4 inputs are transferred into the register. • The four outputs can be sampled to obtain the binary information stored in the register. 12 • When the clear input R goes to zero, all flip-flops are reset (register is cleared to O's). 13 • 8 —Bit Registers can store a byte D Clock Clear Fig. 6-1 4-Bit Register
4
Register with Parallel Load Load When load input = 1 -5 data transferred into register with next —EL When load input = 0 -5 outputs of Flip- Flops are connected to their inputs. Q: Why do we want to connect the outputs to the inputs when load input = 0? D 10 c 11 C 12 c 13 c Clock Fig. 6-2 4-Bit Register with Parallel Load
5
Shift Registers A Shift Register is a register that is capable of shifting its binary information in one or both directions. data D Q Clock D Q out On the leading edge of the first clock pulse, the signal on the data_in is latched in the first flip-flop. On the leading edge of the next clock pulse, the contents of the first flip-flop is stored in the second flip-flop, and the signal which is present at the data_in is stored is the first flip-flop, etc. Can be used to load data stream into a register.
6
Serial Shift Registers — Timing Diagram in D Q Clock CCK D Q D Q out
7
Serial Transfer Example Register A Register B (b) (a) 1011 0010 Initial Value After Tl After T2 After T3 After T 4 1101 1110 0111 1011 1001 1100 0110 1011 With the first pulse T 1, (a) the rightmost bit of A is shifted into the leftmost bit of B and (b) also circulated into the leftmost position of A. At the same time, (c) all bits of A and B are shifted one position to the right.
8
Serial Transfer Example Example: The content of a 4-bit register is initially 1101. The register is shifted 4 times to the right with the serial input being 101001. What is the content of the register after four shifts? Ans: 1001
9
Parallel vs. Serial Data Transmission Shift registers are often used to interface digital systems situated remotely from each other. Task: We want to transmit an n-bit quantity between two location that are far from each other. Options: 1. Use n lines to transmit n bits in parallel. Problem: Cost is expensive. 2. Use a single line to transmit the information serially, one bit at a time. Cost is less.
10
COUNTERS Why do we need counters? Counters in digital circuits may used for 3 functions: Timing: Building a precision digital clock is an example Sequencing: Starting of a rocket motor is an example where the energizing of fuel pumps, ignition, etc. must follow a critical sequence. Counting: Measuring the flow of traffic on a road is an application in which the total number of vehicles passing a certain point must be counted.
11
COUNTERS (continued) A counter is a register that goes through a sequence of states. Counter categories: 1. Ripple counters 2. Synchronous counters Ripple counters: The flip-flop's output transition triggers other flip-flops. Synchronous counters: A common clock triggers all flip-flops simultaneously rather than one at a time in succession as in ripple counters.
12
BINARY RIPPLE COUNTER • A binary ripple counter consists of a series Count connection of complementing flip-flops -5 the output of each flip-flop is connected to the C input of the next higher-order flip-flop. Logic-I Reset (a) With T flip-flops Count Reset (b) With D flip-flops Fig. 6-8 4-Bit Binary Ripple Counter
13
BINARY RIPPLE COUNTER HIGH CCK FFO CCK taz FFI FF2 Qo is complemented with the count pulse. Since Qo goes from 1 to 0, it triggers QI and complements it. As a result, QI goes from 1 0, which in turn complements Q2 changing it from 0 -5 1. Q2 does not trigger Q3 because Q2 produces a positive transition. The flip-flops change one bit at a time in succession and the signal propagates through the counter in a ripple fashion from one stage to the next.
14
SYNCHRONOUS COUNTERS Synchronous counters are different from ripple counters in that the clock is applied to the inputs of all flip-flops, which triggers all flip- flops at the same time. If T = 0 or J = K = 0, the flip-flop does not change state. If T = 1 or J = K = 1, the flip-flop complements. Suppose for a 4-bit counter A3A2AIAo = 0011, the next count is 0100. ' Ao is always complemented. ' Al is complemented because the present state of Ao = 1. ' 142 is complemented because the present state of AIAo = 11. ' 143 is not complemented because the present state of A2A A = 011.
15
4-BIT SYNCHRONOUS COUNTER Flip-Flop Excitation table: Count enable 0 0 1 1 0 1 O 1 0 1 x x x x 1 0 To next stage CLIC Fig. 6-12 4-Bit Synchronous Binary Counter Af the enable is 0 and, all J and K inputs are 0 and the clock does not change the state of counter. > The first stage Ao has its J and K = 1 if enable = 1. > The other J and K are equal to 1 if all previous least significant stages are equal to 1. The chain of AND gates generates the required logic for the J and K inputs in each stage. Note that Synchronous counters have a regular pattern.
Need a Tutor or Coaching Class?
Post an enquiry and get instant responses from qualified and experienced tutors.
If you have your own PowerPoint Presentations which you think can benefit others, please upload on MyPrivateTutor. For each approved PPT you will get 25 Credit Points and 25 Activity Score which will increase your profile visibility.